1. Technical Field
Various embodiments generally relate to a cache device and a control method thereof.
2. Related Art
A cache device is used between a processor and a semiconductor memory device to reduce an access time for the semiconductor memory device.
For example, when a semiconductor memory device having a capacity of 4 GB and a cache device having a capacity of 2 MB are used, 1/2048 of the entire addresses of the semiconductor memory device may be stored in the cache device.
However, when read or write requests are concentrated in a part of the addresses of the semiconductor memory device, data may be frequently evicted from some sets of the cache device, thereby degrading the performances of the cache device and the system including the same.